1. Field of the Invention
This invention relates to integrated circuits and, more particularly, to phase shift drivers.
2. Description of the Related Art
In the semiconductor industry, the demand for higher performing devices has resulted in devices that operate at increasingly higher clock frequencies. As the operational frequencies of devices increase, cycle times are getting smaller. Even though the frequencies and cycle times are changing, the signal skew associated with the operation of these devices may remain the same. If the signal skew is staying relatively constant and the cycle times are being reduced, the skew portion in an operational cycle time may be increasing.
Semiconductor devices may include phase shift drivers used for phase shifting signals. A phase shift driver may receive an input signal at a first phase and generate an output signal at a second phase relative to the input signal. During normal operation of a typical phase shift driver, the expected input signal at a first phase may arrive before a rising edge of the corresponding clock signal due to the relatively large signal skew. As a result, the phase shift driver may generate unwanted output signals. Additionally, the pulse width of the input signal may be much narrower than expected due to the signal skew. In this case, the phase shift driver may fail to generate the expected output signals. Furthermore, after receiving a first input signal, the phase shift driver may be reset to receive a subsequent input signal. In some cases, the reset period may be too long, which may cause the phase shift driver to miss the subsequent input signal and thus fail to generate an output.